R&D Project
National Research Foundation (NRF)
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PIM ๋ฐ๋์ฒด ์ค๊ณ๋ฅผ ์ํ ์คํ์์ค ๊ธฐ๋ฐ์ ๋ฐ๋์ฒด ์ค๊ณ ๊ธฐ์ ๊ฐ๋ฐ (Apr. 2025 - Dec. 2028)
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๊ฒฐ์ -๋น์ ์ง ๋๋
ธ์ฝคํฌ์งํธ ๊ทน๋ฐ๋ง ํน์ด์ ๋ ์์ฌ ๊ฐ๋ฐ ๋ฐ ๋ค์ง๋ฒ์ปดํจํ
์์ฉ๊ธฐ์ ๊ฒ์ฆ (Oct. 2022 โ Jun. 2027)
SK hynix
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AI EDA ๊ธฐ๋ฐ IGZO 2T DRAM ์ค๊ณ ํ๋ผ๋ฏธํฐ ์ต์ ํ (Aug. 2025 - Jul. 2028)
โข
๋ฏธ๋ high density DRAM์ ์ ํฉํ S/A ๋ฐ offset ์ ๊ฐ ๊ธฐ์ , ์ ์ ์ ํ๋ก ๊ธฐ์ ๋ํฅ
Reserach Topic
1. NPU: AI Chip Design based on Neural Procssing Unit
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RNN-based AI Chip Design for DPD in 6G Communication
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VAE-based AI Chip Design for EMIC
2. PIM: AI Chip Design based on Processing-In-Memory
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PIM Architecture-based RTL Synthesizer/Compiler
3. SoC: System-on-Chip Design for Emerging Technology
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Ternary CPU Design using Ternary EDA Tool
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IGZO-based 2T0C DRAM Circuit Design
4. EDA: AI-Driven Electronic Design Automation
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RL-based Parameter Extraction for Device Compact Model Generatrion
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Automatic Test Pattern Generation (ATPG) for DFT of Ternary SoC
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AI-Driven Floorplan for Phsyical Design
Previous R&D Project
ํ๊ตญ์ฐ๊ตฌ์ฌ๋จ
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Memcapacitor-based Multi-Valued Logic Architecture Research (Sep. 2017 - Feb. 2023)
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Multi-Valued Logic Device Integration & Architecture Platform Research (Jun. 2019 โ Dec. 20)
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Graphene Barristor-based Ternary Logic Architecture Research (Aug. 2016 - Jul. 2021)
์ผ์ฑ๋ฏธ๋๊ธฐ์ ์ก์ฑ์ฌ์
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2D Semiconductor Heterojunctions-based Ternary/Quaternary Circuit Reasearch (Jun. 2020 โ May. 2022)
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Ternary CMOS-based Ultra-Low Power Neural Network IC Design (Aug. 2017 - Jul. 2018)
์ฐ์ ์ฒด
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EMCoretech: Development of a Versatile Electromagnetic Interference Control IC by Hardware Control (Jun. 2024 - Dec. 2024)
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Samsung Display Company: Display Driver IC Design for a Very High Resolution TFT LCD Panel (Mar. 2016 - Feb. 2017)