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Low-power 4-trit Current-steering DAC for Ternary Data Conversion

Date
2020/10/21
Published in
IEEE International SoC Design Conference (ISOCC)
Author
Youngchang Choi, Sunmean Kim, Seunghan Baek, Seokhyeong Kang
Type
International Conference
Low-Power 4-Trit Current-Steering DAC for Ternary Data Conversion
A current-steering ternary DAC is proposed to reduce the power consumption and size while retaining better resolution than conventional binary DACs. By applying the method proposed in this paper, a 4-trit ternary DAC is designed. It operates at 100MHz sampling rate and 1.8V supply voltage, and is implemented in 180nm CMOS technology.
https://ieeexplore.ieee.org/abstract/document/9332983