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2025 second half
28
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An Analysis and Design Guideline of High-Speed and Low-Distortion Bootstrapped Switches
IEEE Transactions on Circuits and Systems I: Regular Papers (2025)
Memory-Efficient Batch Normalization by One-Pass Computation for On-Device Training
IEEE Transactions on Circuits and Systems II: Express Briefs (2024)
MP-DPD: Low-Complexity Mixed-Precision Neural Networks for Energy-Efficient Digital Predistortion of Wideband Power Amplifiers
IEEE Microwave and Wireless Technology Letters (2024)
Research on Operational Amplifier Design Based on GMID
2024 4th International Conference on Electronic Information Engineering and Computer (EIECT) (2024)
Memristor-CNTFET based Ternary Full Adders
2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS) (2020)
PIM-HLS: An Automatic Hardware Generation Tool for Heterogeneous Processing-In-Memory-based Neural Network Accelerators
2023 60th ACM/IEEE Design Automation Conference (DAC) (2023)
The Analysis and Application of Redundant Multistage ADC Resolution Improvements Through PDF Residue Shaping
IEEE Transactions on Circuits and Systems I: Regular Papers (2012)
Overcoming Charge Sharing, Race Condition, and Noise Sensitivity in Ternary DDCVSL Circuits
Journal of Integrated Circuits and Systems (2025)
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2025 first half
26
HiPPO: Recurrent Memory with Optimal Polynomial Projections
Advances in neural information processing systems (2020)
An energy-efficient switching scheme based on a splitting structure
Microelectronics Journal (2023)
A Flexible and Efficient FPGA Accelerator for Various Large-Scale and Lightweight CNNs
IEEE Transactions on Circuits and Systems I: Regular Papers (2022)
A 0.021μm² High-Density SRAM in Intel-18A-RibbonFET Technology with PowerVia-Backside Power Delivery
IEEE International Solid-State Circuits Conference (2025)
OPAL:Outlier-Preserved Microscaling Quantization Accelerator for Generative Large Language Models
IEEE/ACM Design Automation Conference (DAC), (2024)
A New Logic Topology-Based Scan Chain Stitching for Test-Power Reduction
IEEE Transactions on Circuits and Systems II: Express Briefs (2020)
RoSE-Opt: Robust and Efficient Analog Circuit Parameter Optimization with Knowledge-infused Reinforcement Learning
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (2025)
An Enhanced Folded Cascode OTA with push pull Input Stage
International Multi-Conference on Systems, Signals & Devices (2012)
DIET-PIM: Dynamic Importance-based Early Termination for Energy-Efficient Processing-in-Memory Accelerator
IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) (2024)
PIM-MMU: A Memory Management Unit for Accelerating Data Transfers in Commercial PIM Systems
57th IEEE/ACM International Symposium on Microarchitecture (MICRO) (2024)
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2024 second half
42
High Efficiency Multiply-Accumulator Using Ternary Logic and Ternary Approximate Algorithm
IEEE Transactions on Circuits and Systems I: Regular Papers (2024)
DPD-NeuralEngine: A 22-nm 6.6-TOPS/W/mm2 Recurrent Neural Network Accelerator for Wideband Power Amplifier Digital Pre-Distortion
arXiv, Hardware Architecture (2024)
Controllability/Observability Measures for Multiple-Valued Test Generation Based on D-algorithm
IEEE International Symposium on Multiple-Valued Logic (2000)
Analyzing and Improving the Image Quality of StyleGAN
IEEE/CVF Conference on Computer Vision and Pattern Recognition (2020)
DNA-based programmable gate arrays for general-purpose DNA computing
Nature (2023)
A 1Tb 4b/Cell 64-Stacked-WL 3D NAND Flash Memory with 12MB/s Program Throughput
IEEE International Solid-State Circuits Conference (2018)
A high speed pseudo-random bit generator driven by 2D-discrete hyperchaos
Chaos, Solitons & Fractals (2023)
TPCSA-MRAM: Ternary Precharge Sense Amplifier-Based MRAM
IEEE Access (2024)
Tunnelling-based ternary metal–oxide–semiconductor technology
Nature Electronics (2019)
Machine Learning Approaches in Battery Management Systems: State of the Art
IEEE International Conference on Industrial Electronics for Sustainable Energy Systems (2020)
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2024 first half
50
Monolithically Integrated RRAM- and CMOS-Based In-Memory Computing Optimizations for Efficient Deep Learning
IEEE Micro (2019)
ParaBit: Processing Parallel Bitwise Operations in NAND Flash
IEEE/ACM International Symposium on Microarchitecture (2021)
Third Base
American Scientist (2001)
BTC-Net: Efficient Bit-Level Tensor Data Compression Network for Hyperspectral Image
IEEE Transactions on Geoscience and Remote Sensing (2024)
Growth of diamond in liquid metal at 1 atm pressure
Nature (2024)
Demystifying Emerging Nonvolatile Memory Technologies: Understanding Advantages, Challenges, Trends, and Novel Applications
IEEE International Symposium on Circuits and Systems (2019)
CMOS-integrated memristive non-volatile computing-in-memory for AI edge processors
Nature Electronics (2019)
Memcapacitive Devices in Logic and Crossbar Applications
arXiv, Emerging Technologies (2017)
Scan Cell Modification for Intra Cell-Aware Scan Chain Diagnosis
IEEE Transactions on Circuits and Systems II: Express Briefs (2022)
An Asymmetric SRAM cell to lower Gate Leakage
International Symposium on Signals, Circuits and Systems. Proceedings (2003)
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2023 second half
46
High-performance SRAM in nanoscale CMOS: Design challenges and techniques
IEEE International Workshop on Memory Technology, Design and Testing (2007)
Standard cell sizing for subthreshold operation
IEEE/ACM Design Automation Conference (2012)
Aquabolt-XL HBM2-PIM, LPDDR5-PIM With In-Memory Processing, and AXDIMM With Acceleration Buffer
IEEE Micro (2022)
CNTFET-Based Design of Ternary Logic Gates and Arithmetic Circuits
IEEE Transactions on Nanotechnology (2011)
A full spectrum of computing-in-memory technologies
Nature Electronics (2023)
Design of CNFET based ternary comparator using grouping logic
IEEE Faible Tension Faible Consommation (2012)
Novel 2.5D RDL Interposer Packaging: A Key Enabler for the New Era of Heterogenous Chip Integration
IEEE Electronic Components and Technology Conference (2021)
Machine Learning Framework for Early Routability Prediction with Artificial Netlist Generator
IEEE/ACM Design, Automation & Test in Europe Conference & Exhibition (2021)
Hardware Architecture and Software Stack for PIM Based on Commercial DRAM Technology : Industrial Product
IEEE/ACM Annual International Symposium on Computer Architecture (2021)
Performance comparison of CNFET- and CMOS-based 6T SRAM cell in deep submicron
Microelectronics Journal (2009)
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2023 first half
6
XNOR-RRAM: A scalable and parallel resistive synaptic architecture for binary neural networks
IEEE/ACM Design, Automation & Test in Europe Conference & Exhibition (2018)
XNOR-SRAM: In-Memory Computing SRAM Macro for Binary/Ternary Deep Neural Networks
IEEE Journal of Solid-State Circuits (2020)
Eyeriss: An Energy-Efficient Reconfigurable Accelerator for Deep Convolutional Neural Networks
IEEE Journal of Solid-State Circuits (2017)
Modern microprocessor built from complementary carbon nanotube transistors
Nature (2019)
Carbon nanotube computer
Nature (2013)
Tunnelling-based ternary metal–oxide–semiconductor technology
Nature Electronics (2019)